fixed bug in ori encoding
parent
5221fe45d9
commit
b666aa05e9
29
assembler.rb
29
assembler.rb
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@ -25,6 +25,10 @@ end
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# # # INSTRUCTIONS # # #
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# # # INSTRUCTIONS # # #
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# ops should always be in format of
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# [src] [args] -> [dest]
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def jmp(addr)
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def jmp(addr)
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# TODO: this probs wont show up since we have < 3mb of ram but
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# TODO: this probs wont show up since we have < 3mb of ram but
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# we can't jump to an address with a different 4 most significant bits
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# we can't jump to an address with a different 4 most significant bits
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@ -45,7 +49,7 @@ end
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# load upper immediate
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# load upper immediate
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# NOTE: val will be shifted left by 16
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# NOTE: val will be shifted left by 16
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def lui(val, dest)
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def lui(val, dest)
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# oooooo ----- ttttt iiiiiiiiiiiiiiii
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# oooooo ----- ddddd iiiiiiiiiiiiiiii
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op = 0b001111_00000_00000_0000000000000000
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op = 0b001111_00000_00000_0000000000000000
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op |= 0xffff & val
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op |= 0xffff & val
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op |= (0b11111 & dest) << 16
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op |= (0b11111 & dest) << 16
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@ -68,10 +72,19 @@ def ori(src, bits, dest)
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op = 0b001101_00000_00000_00000000_00000000
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op = 0b001101_00000_00000_00000000_00000000
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op |= (src & 0b11111) << 21
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op |= (src & 0b11111) << 21
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op |= (bits & 0xffff)
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op |= (bits & 0xffff)
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op |= (dest & 0x11111) << 16
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op |= (dest & 0b11111) << 16
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word op
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word op
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end
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end
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# store word
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def sw(src, offset, dest)
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# oooooo ddddd sssss iiiiiiii iiiiiiii
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op = 0b101011_00000_00000_00000000_00000000
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op |= (src & 0b11111) << 16
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op |= (offset & 0xffff)
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op |= (dest & 0b11111) << 21
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word op
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end
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@ -127,6 +140,18 @@ nop ; jmp $base_addr + 16 ; nop ; word 0xdeadbeef
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lui $gp0 >> 16, 1
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lui $gp0 >> 16, 1
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ori 1, $gp0, 1
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ori 1, $gp0, 1
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nop
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#lui 0, 3
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#ori 3, 0xffff, 3
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#sw 1, 0, 2
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32.times do |i|
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ori i, 0xf00d, i
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end
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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