diff --git a/assembler.rb b/assembler.rb
index bbd331e..bf8f6f5 100644
--- a/assembler.rb
+++ b/assembler.rb
@@ -198,8 +198,9 @@ class Assembler
 		word 0x00000000
 	end
 
-	# load word immediate
-	def lwi(val, dest)
+	# load immediate
+	# TODO: check if we need to use 1 or 2 ops and output that
+	def li(val, dest)
 		lui val >> 16, dest
 		ori dest, val, dest
 	end
diff --git a/main.asm.rb b/main.asm.rb
index 187014c..b037b10 100644
--- a/main.asm.rb
+++ b/main.asm.rb
@@ -4,6 +4,9 @@
 $gp0 = 0x1F801810
 $gp1 = 0x1F801814
 
+# TODO:
+# FIND OUT WHAT WE HAVE TO DO TO REGISTER A VSYNC INTERRUPT
+
 jmp l_start
 nop
 
@@ -17,10 +20,10 @@ label :printf
 
 label :draw_line
 	# todo: draw line function, take args in a0 - a3
-	# tood: implement shift left so we can use that
-	lwi $gp0, t0
+	# tood: implement shift left so we can use that to combine x and y co-ords
+	li $gp0, t0
 
-	lwi 0x40_ffffff, t1 # monochrome line, color ffffff
+	li 0x40_ffffff, t1 # monochrome line, color ffffff
 	sw t1, 0, t0
 
 	# lwi st, t1 # line vert 1
@@ -33,27 +36,27 @@ label :start
 	nop ; nop ; nop ; nop
 
 	# THIS IS NEEDED
-	lwi $gp1, t0
-	lwi 0x03_00_00_00, t1 # display enable
+	li $gp1, t0
+	li 0x03_00_00_00, t1 # display enable
 	sw t1, 0, t0
 
-	lwi $gp0, t0
+	li $gp0, t0
 
-	lwi 0xe1_000000 + 0b0_0_0_1_0_01_00_0_0000, t1
+	li 0xe1_000000 + 0b0_0_0_1_0_01_00_0_0000, t1
 	sw t1, 0, t0
 
 	# THIS IS NEEDED
-	lwi 0xe4_000000 + (640) + (480 << 10), t1 # Drawing Area bottom right
+	li 0xe4_000000 + (640) + (480 << 10), t1 # Drawing Area bottom right
 	sw t1, 0, t0
 
 	def line(st, en)
-		lwi 0x40_ffffff, t1 # monochrome line, color ffffff
+		li 0x40_ffffff, t1 # monochrome line, color ffffff
 		sw t1, 0, t0
 
-		lwi st, t1 # line vert 1
+		li st, t1 # line vert 1
 		sw t1, 0, t0
 
-		lwi en, t1 # line vert 2
+		li en, t1 # line vert 2
 		sw t1, 0, t0
 	end
 
@@ -61,13 +64,13 @@ label :start
 	line 0x0030_0030, 0x0060_0000
 	line 0x0060_000a, 0x00f0_0060
 
-	lwi l_hello_world, a0
+	li l_hello_world, a0
 	jal l_printf
 	addiu sp, -16, sp # delay slot
 	addiu sp, 16, sp
 
 label :end_loop
-	lwi l_end_loop, t9
+	li l_end_loop, t9
 	jr t9
 	nop