changed lwi to li to match other assemblers
parent
2810109764
commit
eb67ac6c5e
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@ -198,8 +198,9 @@ class Assembler
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word 0x00000000
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word 0x00000000
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end
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end
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# load word immediate
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# load immediate
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def lwi(val, dest)
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# TODO: check if we need to use 1 or 2 ops and output that
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def li(val, dest)
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lui val >> 16, dest
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lui val >> 16, dest
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ori dest, val, dest
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ori dest, val, dest
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end
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end
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29
main.asm.rb
29
main.asm.rb
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@ -4,6 +4,9 @@
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$gp0 = 0x1F801810
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$gp0 = 0x1F801810
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$gp1 = 0x1F801814
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$gp1 = 0x1F801814
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# TODO:
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# FIND OUT WHAT WE HAVE TO DO TO REGISTER A VSYNC INTERRUPT
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jmp l_start
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jmp l_start
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nop
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nop
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@ -17,10 +20,10 @@ label :printf
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label :draw_line
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label :draw_line
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# todo: draw line function, take args in a0 - a3
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# todo: draw line function, take args in a0 - a3
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# tood: implement shift left so we can use that
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# tood: implement shift left so we can use that to combine x and y co-ords
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lwi $gp0, t0
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li $gp0, t0
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lwi 0x40_ffffff, t1 # monochrome line, color ffffff
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li 0x40_ffffff, t1 # monochrome line, color ffffff
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sw t1, 0, t0
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sw t1, 0, t0
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# lwi st, t1 # line vert 1
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# lwi st, t1 # line vert 1
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@ -33,27 +36,27 @@ label :start
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nop ; nop ; nop ; nop
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nop ; nop ; nop ; nop
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# THIS IS NEEDED
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# THIS IS NEEDED
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lwi $gp1, t0
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li $gp1, t0
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lwi 0x03_00_00_00, t1 # display enable
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li 0x03_00_00_00, t1 # display enable
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sw t1, 0, t0
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sw t1, 0, t0
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lwi $gp0, t0
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li $gp0, t0
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lwi 0xe1_000000 + 0b0_0_0_1_0_01_00_0_0000, t1
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li 0xe1_000000 + 0b0_0_0_1_0_01_00_0_0000, t1
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sw t1, 0, t0
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sw t1, 0, t0
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# THIS IS NEEDED
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# THIS IS NEEDED
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lwi 0xe4_000000 + (640) + (480 << 10), t1 # Drawing Area bottom right
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li 0xe4_000000 + (640) + (480 << 10), t1 # Drawing Area bottom right
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sw t1, 0, t0
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sw t1, 0, t0
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def line(st, en)
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def line(st, en)
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lwi 0x40_ffffff, t1 # monochrome line, color ffffff
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li 0x40_ffffff, t1 # monochrome line, color ffffff
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sw t1, 0, t0
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sw t1, 0, t0
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lwi st, t1 # line vert 1
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li st, t1 # line vert 1
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sw t1, 0, t0
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sw t1, 0, t0
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lwi en, t1 # line vert 2
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li en, t1 # line vert 2
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sw t1, 0, t0
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sw t1, 0, t0
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end
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end
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@ -61,13 +64,13 @@ label :start
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line 0x0030_0030, 0x0060_0000
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line 0x0030_0030, 0x0060_0000
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line 0x0060_000a, 0x00f0_0060
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line 0x0060_000a, 0x00f0_0060
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lwi l_hello_world, a0
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li l_hello_world, a0
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jal l_printf
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jal l_printf
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addiu sp, -16, sp # delay slot
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addiu sp, -16, sp # delay slot
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addiu sp, 16, sp
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addiu sp, 16, sp
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label :end_loop
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label :end_loop
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lwi l_end_loop, t9
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li l_end_loop, t9
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jr t9
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jr t9
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nop
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nop
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